PCB Board Copying with Signal Integrity Plan

In recent years, pcb board copying has raised the new subject for series and paralleling switch or series and paralleling interconnecting. Accompany with the new development of databus and differential pair structure, pcb board copying is not only a simple copy or pcb clone process, but need to introduce a lot of measures to tackle it.

The parallel databus design’s limitation is on the systematic time frequency change, such as the time clock tilting and transmission delay. Due the time clock tilting on the overall databus width, pcb board copying regarding to the time sequence restriction is still very difficult, meanwhile, increase the time clock rate can only make things worse. From the other side, differential pair structure can apply a interchangeable point to point connection on the hardware layer to realize the crosstalk communication when pcb board copying.

Normally, it can switch the data through a single route cross talk channel, and this single direction cross-talk channel can lay-up to 1-, 2-, 4-, 8-, 16- and 32- width installation. Each channel can carry a bit of data, as a result of that, databus can handle the data width from 8 bits to 256 bits, and through using certain type of error detection skill to retain the data integrity after pcb board copying.